During the fabrication of high-performance static random access memory (SRAM) devices, resistive defects sometimes form. Often, these resistive defects form within a bitcell near the wordline and bitline transfer gate interconnection. In some cases, these resistive defects have an ohmic value that does not significantly affect device function and often is not detectable during normal test and finishing processes. However, during the lifetime of the SRAM device, these resistive defects can lead to bitline failure due to normal aging of bitline precharge circuits. Interestingly, bitline failures due to such resistive defects may not include failure of the bitcell(s) having the resistive defect. No devices or methods for detecting these resistive defects are known.